How NOR Flash Helps Overcome Portable Device Design Challenges

Although wearable and audible technologies appear to be an extension of the previous generation of wearable devices, the innovative features needed to improve their value, user experience and functionality add a significant level of complexity. For example, adding sleek features and functionality in a smartwatch must be done within a rigid form factor and power constraint.

So, as we look at even smaller devices, such as hearing aids and headphones, there are stricter restrictions to be observed, especially the weight of the product. To enable easy-to-implement revisions and continuous feature enhancements of these products in next-generation devices, wearables and hearing aids rely on memory. Memory is a key design factor in enabling these advanced devices.

Features Required to Provide a Superior User Experience

Adding innovative features to a system can significantly increase code size. For example, vital signs monitoring requires significantly more data memory to implement additional design aspects such as security, over-the-air (OTA) updates, data logging, and artificial intelligence ( AI).

Second, security continues to become increasingly critical for every connected device and requires continuous updates. For wireless devices like smartwatches, these updates are more often implemented using OTA mechanisms, which require enough memory to maintain and authenticate a second code image before handing over control to the new code. .

Many devices are also beginning to implement data logging. The impact of user experience logging, data is just beginning to be explored and will enable a whole new range of customization capabilities. Devices that currently track users, such as health monitors, will use more sensors and therefore capture more data.

For the next generation of these devices, AI at the edge will become a disruptive trend, leading to increased memory size requirements. These edge devices use advanced AI systems to run machine learning (ML) algorithms to process data locally on the device for features like voice recognition, face ID, fingerprint detection digital technologies and health surveillance. Due to their low cost, small size, and power efficiency, these devices rely on microcontrollers (MCUs) to run complex ML algorithms. MCUs deploy dedicated cores for parallelized processing, allowing ML models to be executed and optimized on the device itself.

The role of memory in product differentiation

All of these new features drive the need for more non-volatile memory, that is, memory that has the ability to retain stored data even when turned off. Since many wearable and hearing aids are battery operated, NOR flash is often the memory of choice given its fast read access, endurance, and reliability.

In fact, the NOR flash market for smartwatches, wireless headphones and other body-worn devices is expected to grow from $90 million in 2019 to over $265 million by 2024 (Source: Gartner, ABI and Infineon internal estimates). This growth is fueled by increasing demand for memory in connected devices in segments such as automotive, medical and industrial. At the same time, increasing density requirements are also anticipated, moving from low-density memories of 64MB to a medium density of 256MB for portable devices.

Physical size is arguably the most crucial aspect of these memories, as chip size directly determines cost, the final footprint of the device, and ultimately the form factor of the final product. One of the unique requirements of hearing aids and wearables is that the height or profile of a memory device is important. Thus, memory chip depth must also be optimized, and in some applications, such as audible devices, weight is also critical.

For these reasons, memory manufacturers continue to develop innovative technologies and new architectures that improve chip size and power consumption. Consider the SEMPER NOR flash family, which uses proprietary MIRRORBIT technology to store two bits of data per cell, doubling the density in the memory portion of the device. The difference is substantial because it allows for higher density memory in a smaller footprint. A typical 256MB NOR flash has a die size on the order of 18mm2. Thanks to MIRRORBIT technology, 256 MB can fit on a 13.6 mm2 die.

Memory must also be available to manufacturers in array form. Note that a standard approach for portable devices is to use bespoke packaging, such as a wafer-level chip-scale package (WLCSP) with ball array (BGA) connections. In short, manufacturers use their package to integrate multiple processors, such as CPU and DSP, with the memory chip of their choice into a single package, called a system-in-package (SiP), as shown in Figure 1. This, in turn, leads to the need for higher density memory devices since they must now store application code and data from two processors. To enable these SiP devices, SEMPER Nano is offered in KGW (Knowledge Good Wafer) format, which OEMs can integrate with the processor(s) of their choice.

Figure 1 Traditional hearing aids and wearables require an external NOR flash to store code, data, and data logs (left). Applications with an extremely small footprint, such as wireless headphones with true wireless stereo (TWS) capabilities, use a high-density stacked-chip architecture that combines an MCU plus DSP with memory in a single package at the chip scale (right). Source: Infineon

Optimization for lower losses

Traditionally, memory devices are products designed to serve a wide range of applications. However, the tight constraints of the hearing aid and wearable markets require the use of memory that is explicitly optimized for size, power and reliability.

There are several ways to optimize NOR flash to minimize power consumption. Traditionally, low power is achieved by lowering the standby current and the active read current. Deep power off mode can significantly extend battery life to further improve energy efficiency. To put that into perspective, the SEMPER Nano NOR flash has a typical standby current of 5.0A, 54% less than the SEMPER NOR flash, and the typical deep power off mode drops to 1µA, 23% less than the SEMPER NOR flash (Figure 2).

Figure 2 The power consumption of the SEMPER Nano NOR flash is compared to the SEMPER NOR flash. Source: Infineon

The key to reducing power consumption is minimizing the time it takes for memory to transition from active mode to sleep mode. To maximize power savings, memory should be able to immediately enter sleep mode to avoid wasting power unnecessarily (picture 3).

picture 3 The SEMPER Nano NOR flash incorporates a processor to offload processing power and reliability from the application processor. Source: Infineon

Quick read access is essential for features such as “instant on”. No one wants to wait for their headphones to boot up. Here, NOR flash memories are built on an internal parallel array interface to allow for fast read times, allowing larger programs to start faster.

The fast access and low power of NOR falsh allows code to be executed directly from flash, known as Execute-in-Place (XiP), further reducing the time to activate a device. This unified memory approach combines code, data, and logs into a single memory chip. It drastically reduces the overall physical memory footprint by eliminating RAM for code and data storage. It also improves overall reliability, reduces power consumption, and enables smaller form factors and simplified design.

Better memory equals better portable devices

The key to success and profitability in the wearable and hearing aid markets is to differentiate products with innovative features such as advanced fitness and medical monitoring to deliver a superior user experience. These characteristics increase the need for higher density NOR flash memory optimized for size, low power, and reliability. NOR flash’s built-in reliability capabilities, with the ability to store code, data, and logs in a single unified memory, simplify and speed up designs while enabling developers to meet the tight design constraints of these applications.

Linus Wong is Director of Product Management at Infineon Technologies.

Wilson Yen is Senior Application Manager at Infineon Technologies.

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